Stephen Vargo

Applications Manager, Surface Technology Systems

Stephen Vargo studied Aerospace Engineering at the Univ. of Southern California, gaining his PhD in 2000 while also working for 3 years at the Jet Propulsion Laboratory on leading edge MEMS devices for space applications. In 2000, he joined an optical telecom MEMS startup SiWave, Inc. (now Siimpel Corp.) as a Senior Process Development Engineer. He remained at Siimpel for nearly 6 years working on various MEMS products and successfully leading the foundry side of the company using an internal cleanroom. In 2006, he left Siimpel after serving as the Manufacturing Engineering Manager and joined ST Systems Inc. in Aug 2006 as the Applications Manager. He is based in Southern CA but provides process and applications support for the US and has over 10 years of experience working with STS equipment.

Abstract: Advances in DRIE Technology for 200mm and 300mm Wafer Through Silicon Via (TSV) Applications

As the 3D Integration and Packaging markets evolve, new interconnect solutions are being proposed and developed by researchers and device manufacturers. This is driving equipment vendors to deliver reliable, cost effective processes for through wafer via etching. The knowledge and expertise that Surface Technology Systems (STS) has accumulated over many years in deep reactive ion etching (DRIE) of silicon is now being utilised in this important emerging application.

In this presentation STS will present industry leading results and explain some of the technical challenges they have overcome to achieve uniform, high rate etch processes for etching deep though silicon vias of various sizes and shapes.

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