Durham, NC - May 12th, 2008

Venue: Doubletree Guest Suites Raleigh/Durham,
2515 Meridian Parkway,
Durham, North Carolina, United States 27713-5221
Tel: 1-919-361-4660

Agenda

Please click on the speakers names for bios and abstracts.

9:30 Registration
10:00 3D IC Integration, An Emerging System Level Integration Architecture Phil Garrou
MCNC
10:30 Issues and Solutions to enable 3D Integration and Packaging Kathy Cook
SUSS MicroTec
11:00 Emerging 3D Architectures Robert Lanzone
Amkor
11:30 Electrochemical Copper Filling of High Aspect Ratio Through Silicon Vias Arthur Keigler
NEXX SYSTEMS
12:00 Lunch Break
13:00 Development of 3D High-Performance Memory Bob Patti
Tezzaron
13:30 Advances in DRIE Technology for 200mm and 300mm Wafer Through Silicon Via (TSV) Applications Steve Vargo
STS
14:00 Direct Bond Interconnect for 3D Devices Paul Enquist
Ziptronix
14:30 Enabling Technologies for 3D Integration Alan Huffman
RTI
15:00 Coffee Break
15:20 Through Silicon Via: Fast Fill Chemistry Dr. Yun Zhang
Enthone
15:40 Material Solutions for 3D and TSV’s Chris Milasincic
DuPont
16:00 New Materials for 3D Integration Bob Forman
Rohm and Haas
16:20 Thick Chemically-Amplified Photoresists for 3D TSV’s and Plating Georg Pawlowski
AZ
16:40 KMPR - High-resolution DRIE and ultra-high aspect ratio plating resist for TSV and 3D packaging Harris Miller
MicroChem
17:00 Closing Remarks, Drawing, Password for presentations

The seminars will be held from 10:00AM – 5:00PM. Lunch and refreshments will be provided.

Please register here. We look forward to seeing you there.